A five-level nested neutral point-clamped inverter topology

Obe, Desmond, Obe, Chinede T., Odeh, Charles I., and Obe, Emeka S. (2025) A five-level nested neutral point-clamped inverter topology. IET Power Electronics, 18 (1). e12793.

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Abstract

Classical five-level nested neutral point-clamped (5L NNPC) inverter-leg is a hybrid of the flying-capacitor and diode-clamped 5-L inverter-leg configurations. Though uniform reduced voltage stress on the constituting switches is evident in 5L NNPC inverter-leg, trails of the drawbacks of diode-clamping concept still exist. Compared with the classical 5L NNPC inverter, the state-of-the-art diode-free 5L NNPC inverter involves no passive power switches and has low conduction losses. However, in this 5L NNPC inverter, two of the eight active switches have blocking voltage rating of 1/2 of the input voltage. Considering this limiting topological feature, an inverter-leg for 5L NNPC inverter is presented in this paper. In the proposed 5L NNPC inverter-leg, only one switch has voltage stress of 1/2 of the input voltage. This reduced voltage stress has inverter cost and loss implications. The performances and competitiveness of the 5L NNPC inverter were analysed in detail and demonstrated with a prototype. The blocking voltages of all the constituting power switches; profiles of the flying-capacitor voltages; and FFT spectrum of line voltage waveform were experimentally obtained. Experimental deactivation and activation of the inverter's capacitor voltages balancing scheme were typified for varying modulation index values.

Item ID: 88563
Item Type: Article (Research - C1)
ISSN: 1755-4543
Keywords: multilevel inverters, power converters, sinusoidal pulse width modulation, total harmonic distortion
Copyright Information: This is an open access article under the terms of the Creative Commons Attribution-NonCommercial-NoDerivs License, which permits use and distribution in any medium, provided the original work is properly cited, the use is non-commercial and no modifications or adaptations are made. © 2024 The Author(s). IET Power Electronics published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technology.
Date Deposited: 05 May 2026 23:08
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