Navi, K., Foroutan, V., Rahimi Azghadi, M., Maeen, M., Ebrahimpour, M., Kaveh, M., and Kavehei, O. (2009) A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter. Microelectronics Journal, 40 (10). pp. 1441-1448.

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Abstract

A new low-power full-adder based on CMOS inverter is presented. This full-adder is comprised of inverters. Universal gates such as NOR, NAND and MAJORITY-NOT gates are implemented with a set of inverters and non-conventional implementation of them. In the proposed design approach the time consuming XOR gates are eliminated. As full-adders are frequently employed in a tree-structured configuration for high-performance arithmetic circuits, a cascaded simulation structure is employed to evaluate the full-adders in a realistic application environment. The circuits being studied were optimized for energy efficiency using 0.18 μm and 90 nm CMOS process technologies. The proposed full-adder shows full swing logic, balanced outputs and strong output drivability. It is also observed that the presented design can be utilized in many cases especially whenever the lowest possible power consumption is targeted. Circuits layout implementations and checking their functionality have been done using Cadence IC package and Synopsys HSpice, respectively.

Item ID:	45694
Item Type:	Article (Research - C1)
ISSN:	0959-8324
Keywords:	low-power full-adder; low-power CMOS design; inverter-based full-adder design; transmission gate
Date Deposited:	06 Dec 2016 03:38
FoR Codes:	09 ENGINEERING > 0906 Electrical and Electronic Engineering > 090601 Circuits and Systems @ 34% 09 ENGINEERING > 0906 Electrical and Electronic Engineering > 090604 Microelectronics and Integrated Circuits @ 33% 10 TECHNOLOGY > 1007 Nanotechnology > 100705 Nanoelectronics @ 33%
SEO Codes:	97 EXPANDING KNOWLEDGE > 970109 Expanding Knowledge in Engineering @ 33% 97 EXPANDING KNOWLEDGE > 970110 Expanding Knowledge in Technology @ 34% 97 EXPANDING KNOWLEDGE > 970108 Expanding Knowledge in the Information and Computing Sciences @ 33%
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